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Event

IC Design and Verification using Mentor Graphics: An Industry Perspective
Calendar Monday, 19 January 2026

IC Design and Verification using Mentor Graphics: An Industry Perspective

Event
The Department of Semiconductor Engineering, D. Y. Patil International University, Akurdi, successfully conducted a one-week Faculty Development Program (FDP) titled “IC Design and Verification using Mentor Graphics: An Industry Perspective” from 19 January 2026 to 23 January 2026. The FDP aimed to bridge the gap between academic learning and real-world semiconductor industry practices by providing hands-on exposure to industry-standard EDA tools, with a special focus on Mentor Graphics (Siemens EDA) platforms. The program witnessed enthusiastic participation from faculty members and research scholars. The program featured expert sessions by eminent industry professionals including Kedar Patankar, Semiconductor Executive, Mr. VishnuDev R Gowda, Application Engineer, CoreEL Technologies, Mr. Puneet Mittal, CEO and Founder of VLSI EXPERT Pvt. Ltd , and : Mr. Sandip Sathe, Director, Si-GPT/sibay Techno Solutions Pvt. Ltd, covering topics such as IC design flow, verification methodologies, front-end design, and practical training on EDA tools. Hands-on sessions played a key role in enhancing participants’ technical competence and understanding of current industry trends in VLSI and semiconductor design. The FDP was conducted under the guidance of the university leadership and coordinated by the Department of Semiconductor Engineering. The program concluded successfully, receiving positive feedback from participants and reinforcing the university’s commitment to industry-aligned technical education.
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